Impact of VC Merging on Buffer Requirements in ATM Networks

For the implementation of multipoint-to-point connections in ATM, various approaches exist, each with its own advantages and disadvantages. VP-based methods require unique sender identi cation but they do not require reassembly in merging points. In contrast, VC-based methods do not require unique sender identi cation but they do require reassembly in merging points. It is likely that VC merging will be the method of choice as it is scalable and yet relatively simple to implement. One of its drawbacks is the increased output bu er space required at the switches because of packet reassembly at the merging points. This paper investigates the impact of the switch architecture and characteristics on the output bu er space by means of simulation. The results obtained demonstrate that for typical switch architectures, VC merging does not require signi cant additional bu ering compared to VP merging. Work performed at IBM Research Division, Zurich Research Laboratory Author to whom correspondence should be sent.